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dc.contributor.authorMoreno, Víctor
dc.contributor.authorSantiago del Río, Pedro María
dc.contributor.authorRamos, Javier
dc.contributor.authorGarnica, Jaime J.
dc.contributor.authorGarcía Dorado, José Luis 
dc.contributor.otherUAM. Departamento de Tecnología Electrónica y de las Comunicacioneses_ES
dc.date.accessioned2015-06-19T13:13:50Z
dc.date.available2015-06-19T13:13:50Z
dc.date.issued2012-11-26
dc.identifier.citationIEEE Communications Letters 16.11 (2012): 1888 - 1891en_US
dc.identifier.issn1089-7798 (print)en_US
dc.identifier.issn1558-2558 (online)en_US
dc.identifier.urihttp://hdl.handle.net/10486/666935
dc.descriptionPersonal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. V. Moreno, P. M. S. Del Rio, J. Ramos, J. J. Garnica, and J. L. Garcia-Dorado, "Batch to the future: Analyzing timestamp accuracy of high-performance packet I/O engines", IEEE Communications Letters, vol. 16, no. 11, pp. 1888 - 1891, November 2012.en_US
dc.description.abstractNovel packet I/O engines allow capturing traffic at multi-10Gb/s using only-software and commodity-hardware systems. This is achieved thanks to the application of techniques such as batch processing. Nevertheless, this feature involves degradation in the timestamp accuracy, which may be relevant for monitoring purposes. We propose two different approaches to mitigate such effect: a simple algorithm to distribute inter-batch time among the packets composing a batch, and a driver modification to poll NIC buffers avoiding batch processing. Experimental results, using both synthetic and real traffic, show that our proposals allow capturing accurately timestamped traffic for monitoring purposes at multi-10Gb/s rates.en_US
dc.format.extent5 pág.es_ES
dc.format.mimetypeapplication/pdfen
dc.language.isoengen
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.relation.ispartofIEEE Communications Lettersen_US
dc.rights© 2012 IEEEen_US
dc.subject.otherBatch processingen_US
dc.subject.otherCommodity hardwareen_US
dc.subject.otherHigh-performance packet capture enginesen_US
dc.subject.otherPacket timestampingen_US
dc.titleBatch to the future: Analyzing timestamp accuracy of high-performance packet I/O enginesen_US
dc.typearticleen_US
dc.subject.ecienciaTelecomunicacioneses_ES
dc.relation.publisherversionhttp://dx.doi.org/10.1109/LCOMM.2012.092812.121433
dc.identifier.doi10.1109/LCOMM.2012.092812.121433
dc.identifier.publicationfirstpage1888
dc.identifier.publicationissue11
dc.identifier.publicationlastpage1891
dc.identifier.publicationvolume16
dc.type.versioninfo:eu-repo/semantics/acceptedVersionen
dc.contributor.groupComputación y Redes de Altas Prestaciones (ING EPS-004)es_ES
dc.rights.accessRightsopenAccessen
dc.authorUAMSantiago Del Rio, Pedro María (264042)
dc.facultadUAMEscuela Politécnica Superior


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