Power audit of a Space-Certified Microprocessor
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Power audit of a Space-Certified Microprocessor
Title:
Power audit of a Space-Certified Microprocessor
Author:
González-de-Rivera, Guillermo; Garrido, Javier; Boemo, Eduardo I.
Entity:
UAM. Departamento de Ingeniería Informática
UAM Author:
Boemo Svcalvinoni, Eduardo Iván
Date:
1999
Citation:
PATMOS -INTERNATIONAL WORKSHOP: Power and timing modeling, optimization and simulation, PATMOS 1999. 271-282
Subjects:
Informática; Telecomunicaciones
Esta obra está bajo una licencia de Creative Commons Reconocimiento-NoComercial-SinObraDerivada 4.0 Internacional.
Abstract:
In this paper, an on-board uP system is characterized and the efficacy of some straightfoward LPD techniques is quatified. As results, some system-level design rules to save power, even in a highly optimized space-certified microprocessor are obtained. The MA31750 chip has been selected as technological framework for the experiments
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™ Scholar:
González-de-Rivera, Guillermo
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Garrido, Javier
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Boemo, Eduardo I.