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Power audit of a Space-Certified Microprocessor

dc.contributor.authorGonzález de Rivera Peces, Guillermo José 
dc.contributor.authorGarrido Salas, Javier 
dc.contributor.authorBoemo Svcalvinoni, Eduardo Iván 
dc.contributor.otherUAM. Departamento de Ingeniería Informáticaes_ES
dc.date.accessioned2015-07-16T10:04:08Z
dc.date.available2015-07-16T10:04:08Z
dc.date.issued1999
dc.identifier.citationPATMOS -INTERNATIONAL WORKSHOP: Power and timing modeling, optimization and simulation, PATMOS 1999. 271-282en_US
dc.identifier.urihttp://hdl.handle.net/10486/667397
dc.description.abstractIn this paper, an on-board uP system is characterized and the efficacy of some straightfoward LPD techniques is quatified. As results, some system-level design rules to save power, even in a highly optimized space-certified microprocessor are obtained. The MA31750 chip has been selected as technological framework for the experimentsen_US
dc.format.extent10 pág.es_ES
dc.format.mimetypeapplication/pdfen
dc.language.isoengen
dc.titlePower audit of a Space-Certified Microprocessoren_US
dc.typeconferenceObjecten
dc.subject.ecienciaInformáticaes_ES
dc.subject.ecienciaTelecomunicacioneses_ES
dc.identifier.publicationfirstpage271
dc.identifier.publicationlastpage282
dc.relation.eventdateOctober 6 - 8, 1999en_US
dc.relation.eventnumber9
dc.relation.eventplaceKos Island (Greece)en_US
dc.relation.eventtitleNinth International Workshop Power and Timing Modeling, Optimization and Simulation, PATMOS 1999en_US
dc.type.versioninfo:eu-repo/semantics/publishedVersionen
dc.rights.ccReconocimiento – NoComercial – SinObraDerivadaes_ES
dc.rights.accessRightsopenAccessen
dc.authorUAMBoemo Svcalvinoni, Eduardo Iván (259594)
dc.facultadUAMEscuela Politécnica Superior


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