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dc.contributor.authorSánchez González, Alberto 
dc.contributor.authorYushkova, Marina 
dc.contributor.authorCastro Martín, Ángel de 
dc.contributor.authorMartínez García, María Sofía 
dc.contributor.authorGarrido Salas, Javier 
dc.contributor.otherUAM. Departamento de Tecnología Electrónica y de las Comunicacioneses_ES
dc.date.accessioned2019-08-09T14:17:00Z
dc.date.available2019-08-09T14:17:00Z
dc.date.issued2018-12-21
dc.identifier.citationElectronics 8.4 (2019): 1-17en_US
dc.identifier.issn2079-9292es_ES
dc.identifier.urihttp://hdl.handle.net/10486/688355
dc.description.abstractCommon implementations of power factor correction include sensors for the input and output voltages and the input current. Many alternatives have been considered to reduce the number of sensors, especially the current sensor. One strategy is to precalculate the duty cycles that must be applied to every ac main, so the system only needs to synchronize them with the input voltage, and include a simple output voltage loop. The main problem with this approach is the sensibility to any synchronization error, because the input current is not measured, so its evolution is not continuously corrected. This paper shows how the synchronization error alters the current and the power factor, and it proposes several methods to detect and correct this error. All methods use the output voltage ADC, which is already used to control the output voltage, so the cost of the system is not increased. This technique can also be applied to any current sensorless PFC converter, because they are usually affected by leading or lagging currents, so the synchronization can be modified to reduce these effects. Results show that the implementation of this synchronization loop keeps a high-power factor under a wide synchronization error range, while the added logic is not significant.en_US
dc.description.sponsorshipThis research was funded by Spanish Ministerio de Economía y Competitividad grant number TEC2013-43017-R.en_US
dc.format.extent17 págs.es_ES
dc.format.mimetypeapplication/pdfen
dc.language.isoengen
dc.publisherMDPI, Basel, Switzerlanden_US
dc.relation.ispartofElectronicsen_US
dc.rights© 2018 by the authors. Licensee MDPI, Basel, Switzerlanden_US
dc.subject.otherAC-DC power conversionen_US
dc.subject.otherDigital controlen_US
dc.subject.otherField programmable gate arraysen_US
dc.subject.otherPower factoren_US
dc.titleAC mains synchronization loop for precalculated-based PFC converters using the output voltage measureen_US
dc.typearticleen
dc.subject.ecienciaInformáticaes_ES
dc.relation.publisherversionhttps://doi.org/10.3390/electronics8010004es_ES
dc.identifier.doi10.3390/electronics8010004es_ES
dc.identifier.publicationfirstpage1es_ES
dc.identifier.publicationissue4es_ES
dc.identifier.publicationlastpage17es_ES
dc.identifier.publicationvolume8es_ES
dc.relation.projectIDGobierno de España. TEC2013-43017-R.es_ES
dc.type.versioninfo:eu-repo/semantics/publishedVersionen
dc.contributor.groupHardware and Control Technology Laboratory (HCTLab)en_US
dc.rights.ccReconocimientoes_ES
dc.rights.accessRightsopenAccessen
dc.authorUAMSánchez González, Alberto (262030)
dc.authorUAMDe Castro Martín, Ángel (261705)
dc.authorUAMMartínez García, María Sofía (271684)
dc.authorUAMGarrido Salas, Javier (259830)
dc.facultadUAMEscuela Politécnica Superior


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