AC mains synchronization loop for precalculated-based PFC converters using the output voltage measure

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dc.contributor.author Sánchez, Alberto
dc.contributor.author Yushkova, Marina
dc.contributor.author de Castro, Ángel
dc.contributor.author Martínez-García, M. Sofía
dc.contributor.author Garrido, Javier
dc.contributor.other UAM. Departamento de Tecnología Electrónica y de las Comunicaciones es_ES
dc.date.accessioned 2019-08-09T14:17:00Z
dc.date.available 2019-08-09T14:17:00Z
dc.date.issued 2018-12-21
dc.identifier.citation Electronics 8.4 (2019): 1-17 en_US
dc.identifier.issn 2079-9292 es_ES
dc.identifier.uri http://hdl.handle.net/10486/688355
dc.description.abstract Common implementations of power factor correction include sensors for the input and output voltages and the input current. Many alternatives have been considered to reduce the number of sensors, especially the current sensor. One strategy is to precalculate the duty cycles that must be applied to every ac main, so the system only needs to synchronize them with the input voltage, and include a simple output voltage loop. The main problem with this approach is the sensibility to any synchronization error, because the input current is not measured, so its evolution is not continuously corrected. This paper shows how the synchronization error alters the current and the power factor, and it proposes several methods to detect and correct this error. All methods use the output voltage ADC, which is already used to control the output voltage, so the cost of the system is not increased. This technique can also be applied to any current sensorless PFC converter, because they are usually affected by leading or lagging currents, so the synchronization can be modified to reduce these effects. Results show that the implementation of this synchronization loop keeps a high-power factor under a wide synchronization error range, while the added logic is not significant. en_US
dc.description.sponsorship This research was funded by Spanish Ministerio de Economía y Competitividad grant number TEC2013-43017-R. en_US
dc.format.extent 17 págs. es_ES
dc.format.mimetype application/pdf en
dc.language.iso eng en
dc.publisher MDPI, Basel, Switzerland en_US
dc.relation.ispartof Electronics en_US
dc.rights © 2018 by the authors. Licensee MDPI, Basel, Switzerland en_US
dc.subject.other AC-DC power conversion en_US
dc.subject.other Digital control en_US
dc.subject.other Field programmable gate arrays en_US
dc.subject.other Power factor en_US
dc.title AC mains synchronization loop for precalculated-based PFC converters using the output voltage measure en_US
dc.type article en
dc.subject.eciencia Informática es_ES
dc.relation.publisherversion https://doi.org/10.3390/electronics8010004 es_ES
dc.identifier.doi 10.3390/electronics8010004 es_ES
dc.identifier.publicationfirstpage 1 es_ES
dc.identifier.publicationissue 4 es_ES
dc.identifier.publicationlastpage 17 es_ES
dc.identifier.publicationvolume 8 es_ES
dc.relation.projectID Gobierno de España. TEC2013-43017-R. es_ES
dc.type.version info:eu-repo/semantics/publishedVersion en
dc.contributor.group Hardware and Control Technology Laboratory (HCTLab) en_US
dc.rights.cc Reconocimiento es_ES
dc.rights.accessRights openAccess en
dc.authorUAM Sánchez González, Alberto (262030)
dc.authorUAM De Castro Martín, Ángel (261705)
dc.authorUAM Martínez García, María Sofía (271684)
dc.authorUAM Garrido Salas, Javier (259830)


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